Method of producing acceleration sensors

ABSTRACT

A method for producing acceleration sensors is proposed, in which a silicon layer that is deposited in an epitaxial application system is used. Above sacrificial layers (2) applied to the substrate (1), the material grows in the form of a polysilicon layer (6), which has a certain surface roughness. By application of a photoresist and by a wet etching process, this surface roughness is eliminated. Alternatively, chemical-mechanical smoothing is contemplated.

PRIOR ART

The invention is based on a method as generically defined by thepreamble to the main claim.

From German Patent Disclosure DE 43 18 466, a method for producing amicromechanical sensor is already known in which a substrate with asacrificial layer is used. In an epitaxial application system, a siliconlayer is deposited on this substrate. Above the sacrificial layer, thissilicon layer grows in the form of a polysilicon layer. As thesubstrate, a monocrystalline silicon wafer is used, so that the siliconmaterial, in the regions where it has immediate content with thesubstrate, grows in the form of monocrystalline silicon.

ADVANTAGES OF THE INVENTION

The method according to the invention having the characteristics of theindependent claim has the advantage over the prior art that smoothing ofthe polysilicon layer is attained. As a result of the smoothing, thestructures for the sensors can be made in the polysilicon layer withespecially high precision. High-quality sensor structures can thus beproduced with great precision.

By the provisions recited in the dependent claims, advantageous furtherfeatures of and improvements to the method disclosed in the independentclaim are possible. Especially precisely, the structuring of thepolysilicon layer is done by a plasma etching process. To improve thequality of the polysilicon layer from the very outset, a polysiliconstarter layer may be provided on the sacrificial layer. By using asacrificial layer, which covers the entire surface of the substrate, anespecially simple method for producing sensors is disclosed. When astructured sacrificial layer is used, the sensor structures can beanchored especially well to the surface of the substrate. By usingmonocrystalline silicon as a wafer, anchored regions are created thatcomprise monocrystalline silicon. This method has especially goodproperties. By leveling the polycrystalline layer until it forms asingle plane with the monocrystalline layer, an especially high-qualitysurface is created that is especially highly suitable for furtherprocessing. In particular, electronic circuits can then be made in themonocrystalline silicon layer and can be connected to the sensorstructures with surface-mounted or buried conductor tracks.

DRAWINGS

Exemplary embodiments of the invention are shown in the drawings anddescribed in further detail in the ensuing description.

FIGS. 1-3 show the production method known from the prior art (DE 43 18466);

FIGS. 4 and 5 show the etching step according to the invention;

FIGS. 6 and 7 show the leveling of the polysilicon layer andmonocrystalline silicon layer, and

FIG. 8 shows the method with a full-surface sacrificial layer on thesubstrate.

DESCRIPTION OF THE EXEMPLARY EMBODIMENTS

In FIG. 1, a substrate 1 is shown on which a sacrificial layer 2 isapplied. Over the sacrificial layer, a polysilicon starter layer 3 isapplied. It will be assumed hereinafter that the substrate 1 is amonocrystalline silicon substrate. However, other types of substrates ofceramic materials, glass or metal are usable in principle as well. Thesacrificial layer shown here is provided only in individual regions ofthe top side of the substrate 1. However, it is equally possible for thesacrificial layer 2 to cover the entire surface of the substrate 1. Thepolysilicon starter layer 3 is applied to the sacrificial layer 2 inorder to improve the quality of the ensuing deposition of silicon.However, the method can also be performed without this polysiliconstarter layer.

Any materials that can be etched selectively to silicon are conceivableas material for the sacrificial layer 2, especially silicon oxide,silicon nitride, glass or metals. The polysilicon starter layer 3 ispreferably deposited in an LPCVD (low-pressure chemical vapordeposition) reactor, since such deposits can be made on arbitrarysurfaces at low temperatures.

The substrate of FIG. 1 is introduced into an epitaxial applicationsystem, in which a silicon layer 4 is then deposited. Such epitaxialapplication systems are conventionally used in semiconductor technologyto deposit monocrystalline epitaxial layers on monocrystalline siliconwafers. On monocrystalline silicon wafers, the layers grow in the formof monocrystalline silicon layers. If other substrates that are notmonocrystalline silicon materials are used, then a silicon layer thathas a polycrystalline structure is deposited. In FIG. 1, a substrate 1that is partly covered with a sacrificial layer 2 is used. Amonocrystalline silicon layer 5 grows in the regions where the layer 4is directly in contact with the monocrystalline substrate 1. Above thesacrificial layer 2 or polysilicon starter layer 3, a polycrystallinesilicon layer 6 grows. The growth proceeds such that the polycrystallineregion 6 still extends slightly to both sides of the sacrificial layer 2or polysilicon starting layer 2. This is shown in FIG. 2.

After the deposition of the silicon layer 4, a photoresist layer 7 isapplied and structured. This photoresist layer then serves as an etchingmask for an ensuing etching step.

FIG. 3 shows trench structures 8 which have been etched into thepolysilicon layer 6. Etching of the trench structures 8 is preferablydone by a plasma etching process, since such processes allow the makingof especially deep, narrow trenches. After the trench structures 8 havebeen etched in, the sacrificial layer 2 is dissolved out. This is doneby a wet chemical or plasma etching process. Vapors, such ashydrofluoric acid vapor, can also be used.

The course of the former process described in conjunction with FIGS. 1-3is also already known from DE 43 18 466.

In FIG. 4, the surface of the polycrystalline silicon layer 6 is shownon a larger scale. As can be seen, the surface of the polycrystallinesilicon layer 6 has a structure with a large particle size, which isdictated by the polycrystalline structure of the polysilicon layer 6.The surface roughness of such layers may be on the order of magnitude ofa few micrometers. The photoresist layer 7 known from FIG. 2 is as arule structured by optical methods. Because of the surface roughness,the desired structure cannot be projected onto a defined plane, andscattering of light occurs. In the case of a rough surface, the accuracyof structuring of the photoresist layer 7 is accordingly limited. Sincefor sensors, especially acceleration sensors, structural widths of a fewmicrometers are used and these must be made precisely to a few tenths ofa micrometer, it is an object to reduce the surface roughness.

To that end, it is shown in FIG. 4 that in an intermediate step, onefurther photoresist layer 9 is applied. A plasma etching step is thenperformed, and for this plasma etching step the etching parameters areselected such that polysilicon 6 and photoresist 9 are etched at thesame etching rates. In FIG. 5, an intermediate step of this etchingprocess is shown. The smoothing action of the etching process is basedon the fact that the photoresist is first applied as a liquid and thusafter hardening forms a smooth surface. Since the etching rate ofphotoresist and polysilicon is the same, this smooth surface istransferred to the polysilicon itself by the etching process. Thesmoothing step is performed for the deposited silicon layer, before thephotoresist layer 7 for etching the trenches 8 is applied. As a resultof the thus-smoothed surface of the polysilicon layer 6, especiallyprecise structuring of the photoresist layer 7 and thus especiallyprecise structuring of the etching trenches 8 can be done.

For the plasma etching, a gas mixture of SF₆ and oxygen is for instancepossible. The etching rates of polysilicon and photoresist can beadapted to one another by varying the ratio of the two etching gases toone another.

In FIGS. 9-12, a further improved smoothing process is shown. It isassumed here that the polycrystalline silicon layer 6 has an extremelylarge particle size. Over this polycrystalline silicon layer 6, aphotoresist layer 9 is applied. Because of the extreme irregularity ofthe polysilicon layer 6, the photoresist layer 9 also has anirregularity of its surface, although to a markedly lesser extent andwith a more rounded nature. At very coarse surface roughnesses, such aphotoresist surface cannot be avoided entirely even if an especiallylow-viscosity photoresist is chosen. This is shown in FIG. 9.

A plasma etching step is then done; for this plasma etching step, theetching parameters are selected such that polysilicon 6 and photoresist9 are etched at the same etching rate. The resultant polysilicon layer 6is shown in FIG. 10. The polysilicon layer 6 has been markedly smoothed,but a certain residual waviness still exists.

Despite the remaining residual waviness, markedly improved trenchstructures 8 can now be made. Still further improvement, however, isattained by applying another photoresist layer 9 to the polysiliconlayer 6. Since the surface irregularities to be compensated for areslight, the surface of the photoresist layer 9 is now planar. This isshown in FIG. 11.

Once again, an etching step ensues, the etching parameters beingselected such that the polysilicon 6 and photoresist 9 are etched at thesame etching rate. In FIG. 12, the polysilicon layer 6 is shown afterthe completion of this etching step. The now-smooth surface of thepolysilicon layer 6 enables still further-improved structuring.

As a result of the two-step smoothing process, the further optimizationoption is also offered of adapting the viscosity and the surface tensionof the photoresist and the etching method to the roughness to becompensated for. For instance, the photoresist for the first smoothingstep can be selected as somewhat lower in viscosity, in order tocompensate for the greater roughnesses.

Another possibility for smoothing the surface of the polysilicon layer 6is a chemical-mechanical polishing process. Polishing devices of thekind known for instance from metallurgy for polishing ground metalsurfaces that are examined optimally, or in semiconductor physics, canbe used. This polishing device has a rotating polishing table that isprovided with an elastic polishing overlay. The polishing overlay issaturated with a polishing agent. The polysilicon surface to be machinedis pressed against the polishing overlay. In contrast to purelymechanical polishing which has been employed for a long time, thispolishing agent contains both polishing grains and active chemicaladditives. To keep light scattering slight, it is recommended thatpolishing particles with the smallest possible diameter be selected.This chemical-mechanical surface treatment likewise leads to a surfaceof the polysilicon layer 6 that permits very fine structuring in anensuing step.

A surprising aspect here is that even microstructured components can bemachined. At the beginning of the polishing process, the component has ashoulder which could offer an engagement point for damage duringpolishing. In the further course of the polishing process, however, thisshoulder is reduced and the polysilicon is smoothed. It is recommendedthat the polishing process be ended before the shoulder has been leveledcompletely. The surface is then smooth enough to achieve the intendedimprovement in optical structuring, yet at the same time the smallshoulder can be used as an adjustment mark.

In FIGS. 6 and 7, a further exemplary embodiment of the method of theinvention is shown. The substrate 1, the sacrificial layer 2, thepolysilicon starter layer 3, and the silicon layer 4 with themonocrystalline silicon layer 5 and the polycrystalline silicon layer 6again correspond to the layers as known from FIGS. 1-3. However, ontothe surface of the silicon layer 4, a further masking layer 10 isapplied as well; it comprises a material that has a particularly lowetching rate in the ensuing smoothing etching process. This maskinglayer 10, which may for instance comprise silicon oxide or a thickresist layer, leaves the polycrystalline region 6 largely free, however.After that, a photoresist layer 9 is again applied. In the ensuingsmoothing etching step, in which the photoresist layers 9 is etched atthe same etching rate as the polysilicon material 6, again leads tosmoothing of the polycrystalline silicon 6. The process is continued,however, until such time as the polysilicon layer 6 forms a smoothsurface with the monocrystalline silicon layer 5. This situation isshown in FIG. 7. The polycrystalline silicon layer 6 and themonocrystalline silicon layer 5 now form one common, flat surface. Ontothis surface, conductor track structures 11 can be deposited especiallysimply; they no longer need to overcome any difference in height betweenthese two silicon layers. This method is therefore especially suitableif integrated semiconductor elements 12, by which an evaluation of thesensor structure in the polysilicon layer 6 is to be performed, areprovided in the monocrystalline silicon layer 5.

In FIG. 8, a further exemplary embodiment of the method of the inventionis shown. On a substrate 1, a sacrificial layer 2 is to that end isapplied that covers the entire surface of the substrate 1. Over thesacrificial layer 2, a silicon layer 4 is then applied in an epitaxialreactor; this layer grows over the entire surface in the form of apolycrystalline layer 6. Before the deposition of the silicon layer 4,it is also possible, as shown in FIG. 8, for a polycrystalline starterlayer 3 to be applied. A smoothing step then follows, with which thesurface roughness of the entire surface of the polycrystalline siliconlayer 6 is smoothed. This smoothing step corresponds to the method asdescribed in conjunction with FIGS. 4 and 5 above. In a further step,trench structures 8 are then etched, extending from the top side of thepolycrystalline silicon layer 6 as far as the sacrificial layer 2. In afurther etching step, the sacrificial layer 2 under the etched-instructures in the polysilicon layer 6 is then removed. This step ofetching the sacrificial layer is done by bringing an etching solution tothe sacrificial layer 2 through the etched trench structures 8. Thisetching solution dissolves the sacrificial layer 2, and beginning at thetrench structures 8, lateral underetching underneath the polycrystallinesilicon layer 6 takes place only slowly. The underetching ends as soonas the sacrificial layer 2 underneath the etched-in structures has beenremoved, yet when the other, larger-area regions of the polycrystallinelayer 6 have not yet been underetched. Since structuring of thesacrificial layer 2 is unnecessary in this method, this method isespecially simple.

We claim:
 1. A method for producing sensors, especially accelerationsensors in which on a substrate (1) with a sacrificial layer (2), in anepitaxial application system, a silicon layer (4) is deposited that isdeposited above the sacrificial layer (2) as a polysilicon layer (6), afirst photoresist layer (7) being applied to the polysilicon layer (6)and being structured by optical methods as an etching mask, andstructures (8) being introduced into the polysilicon layer (6) throughthe etching mask, which structures extend from the top side of thepolysilicon layer (6) as far as the sacrificial layer (2), a sacrificiallayer (2) being removed from beneath the structures (8), characterizedin that the surface of the polysilicon layer (6) is post-machined in asmoothing process before the first photoresist layer (7) is applied. 2.The method of claim 1, characterized in that the smoothing process iseffected in that a photoresist (9) is applied, and an etching process isperformed which etches the polysilicon layer (6) and the photoresist (9)at approximately the same etching rate.
 3. The method of claim 2,characterized in that after etching of the photoresist (9), a furtherlayer of photoresist (9) is applied and a further etching process isformed.
 4. The method of claim 2, characterized in that the etchingprocess is performed as a plasma etching process.
 5. The method of claim1, characterized in that the smoothing process is effected bychemical-mechanical polishing.
 6. The method of claim 1, characterizedin that a polysilicon starter layer (3) is deposited on the sacrificiallayer (2) before the deposition of the silicon layer (4) in theepitaxial application system.
 7. The method of claim 1, characterized inthat the sacrificial layer (2) covers the entire surface of thesubstrate (1).
 8. The method of claim 1, characterized in that thesacrificial layer (2) is structured before the deposition of the siliconlayer (4) in the epitaxial application system.
 9. The method of claim 8,characterized in that the substrate (1) comprises monocrystallinesilicon, and that the silicon layer (4), in those regions where nosacrificial layer (2) is provided, grows in the form of amonocrystalline silicon layer (5).
 10. The method of claim 9,characterized in that the smoothing step of the polysilicon layer (6) isperformed until such time as the polycrystalline silicon layer (6) andthe monocrystalline silicon layer (5) form a common, flat surface. 11.The method of claim 10, characterized in that electronic circuits (12)are formed in the monocrystalline silicon layer (5), and that on thecommon, flat surface, conductor tracks (11) are provided, extending fromthe circuits (12) as far as the polysilicon layer (6).
 12. The method ofclaim 1, characterized in that after the smoothing process, a smallshoulder remains between the polysilicon layer (6) and themonocrystalline silicon layer (5), which shoulder is used as anadjusting mark.